JEDEC’s newly ratified JESD230G NAND Flash Interoperability Standard marks a major step forward for flash memory. First introduced in 2011, JESD230 has steadily improved speed and efficiency, but earlier versions were restricted because commands, addresses, and data all used the same bus.
JESD230G eliminates that bottleneck with the Separate Command Address (SCA) protocol. By giving commands and addresses their own dedicated path, systems can now handle both control and data traffic in parallel - unlocking faster speeds
The ripple effect is significant: NAND devices, memory controllers, firmware, and SoC designs will all evolve to support the new interface. The result will be faster, more efficient storage for everything from consumer electronics to cloud infrastructure, with AI and high-performance computing among the biggest beneficiaries.
Industry adoption is already underway, with NAND manufacturers, controller vendors, and EDA providers preparing solutions built on JESD230G. For end users, the transition will be seamless - storage will simply get faster and smarter.
At Kioxia, we’re working closely with standards groups and partners to help drive this next era of NAND innovation.
Learn more in this article I wrote for Electronic Design: What’s the Difference Between JESD230G and Earlier JEDEC Standards?
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The views and opinions expressed in this blog are those of the author(s) and do not necessarily reflect those of KIOXIA America, Inc.